1. Field of the Invention
The present invention relates to a semiconductor device having a structure wherein a semiconductor element is connected to a circuit board by connecting electrodes such as projecting electrodes and, more particularly, to a semiconductor device having a temperature regulation means formed in a circuit board.
2. Description of the Related Art
Conventionally, a semiconductor element (referred to as a chip hereinafter) formed on a die pad is mounted on a circuit board by electrically bonding the distal ends of a plurality of leads leading from the semiconductor element to a wiring pattern formed on the circuit board, or a semiconductor element is directly mounted on a circuit board and they are electrically connected to each other by wire bonding or TAB (Tape Automated Bonding). However, the mounting of the chip on the circuit board by leading the leads from the chip is a great hindrance to high-density mounting of the semiconductor device. In particular, a semiconductor device has recently been used in many ways, and the mounting density is increasingly improved. To mount the chip using leads does not meet the requirement of high density, while a thin circuit board such as a memory card is employed and the number of memory devices tends to increase. Therefore, one takes notice of a flip chip method of directly connecting a plurality of connecting electrodes formed on a chip to a circuit board.
FIG. 1 shows a prior art semiconductor device in which a plurality of silicon chips are connected to a circuit board 2 by flip chip bonding. Such a semiconductor device is disclosed in U.S. Pat. No. 3,401,126 and U.S. Pat. No. 3,429,040. Each silicon chip 1 includes pad electrodes 7 formed on the surface thereof and constituted by aluminum or the like to serve as connecting electrodes 10 electrically connected to an integrated circuit formed in the chip, and projecting electrodes 3 of about 100 .mu.m in height bonded onto the pad electrodes 7 and constituted by low melting-point metal containing Pb, Sn, or the like, as the principal ingredient. The projecting electrodes 3 are electrically connected to circuit patterns 8 of a wiring layer formed on the surface of the circuit board 2. The projecting electrodes 3 can be constituted by gold as well as the low melting-point metal or obtained by forming a conductive layer on the surface of an insulative ball-shaped object. Pb-Sn solder, In-Sn solder, etc. are known as the low melting-point metal. The circuit board can be replaced with a printed board, a ceramic board, a silicon board, and the like, which have a laminated structure impregnating a glass material with epoxy resin.
In general, the temperature of the semiconductor device is increased by heat generated from the semiconductor chips 1 when it is used. The heat generated therefrom is transmitted to the circuit board 2 through the projecting electrodes 3 to increase the temperature of the circuit board itself. Then the chip 1 and circuit board 2 are thermally expanded. In the flip chip bonding, if there is a difference in coefficient thermal expansion (CTE) between the semiconductor substrate and circuit board, the thermal stress caused by the difference is concentrated upon the projecting electrodes 3. FIG. 2 shows a deformation of the semiconductor device of FIG. 1, as indicated by the dotted lines. Assume that the thermal expansion coefficient of the circuit board 2 is .alpha.sub, that of the chip 1 is .alpha.si, and the distance between the neutral point of the deformation (the center of the chip) O and the projecting electrode 3 is L. If the temperature of the chip 1 and that of the circuit board 2 increase from room temperature T0 to temperature T, the thermal expansion .DELTA.L1 of the chip 1 is expressed by .alpha.si.times.(T-T0) .times.L, and the thermal expansion .DELTA.L2 of the circuit board 2 is given by .alpha.sub.times.(T-T0).times.L. The chip 1 and circuit board 2 are therefore different in thermal expansion from each other. In FIG. 2, the thermal expansion coefficient .alpha.sub of the circuit board 2 is larger than that .alpha.Si of the silicon chip 1, and the thermal expansion of the circuit board 2 is larger than that of the chip 1 (.DELTA.Ll&lt;.DELTA.L2). Consequently, as described above, the thermal stress is concentrated on the projecting electrodes 3 serving as connecting electrodes of the chip 1 and circuit board 2, thereby decreasing the reliability of the semiconductor device.
If, in particular, low melting-point metal such as solder containing Pb or Sn as the main ingredient is used for the connecting electrodes such as the projecting electrodes 3, the concentration of the thermal stress appears as a plastic strain since the yield stress of the low melting-point metal is small. When the semiconductor device is repeatedly turned on and turned off, a plastic strain repeatedly occurs on the projecting electrodes and causes them to be fatigued more greatly, thereby reducing the long-period reliability of the semiconductor device.
Even though a material having the same thermal expansion coefficient as that of the silicon substrate or silicon chip is selected as the circuit board, if there occurs a difference in temperature between the chip and circuit board in the transition of temperature, fatigue becomes worse on the projecting electrodes 3 and the reliability of the semiconductor device is lowered, as described above.
The long-period reliability of the projecting electrodes 3 formed on the chip 1 lowers more and more since the distance L shown in FIG. 2 increases as the size of the chip 1 becomes large.